"ROMA: A Reconfigurable On-chip Memory Architecture for Multi-core ..."

Shantian Qin et al. (2023)

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DOI: 10.1109/HPCC-DSS-SMARTCITY-DEPENDSYS60770.2023.00017

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type: Conference or Workshop Paper

metadata version: 2025-11-13

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Shantian Qin, Wenming Li, Zhihua Fan, Zhen Wang, Tianyu Liu, Haibin Wu, Kunming Zhang, Xuejun An, Xiaochun Ye, Dongrui Fan:
ROMA: A Reconfigurable On-chip Memory Architecture for Multi-core Accelerators. HPCC/DSS/SmartCity/DependSys 2023: 49-57

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