"A Deadlock-Free Bridge Module for Inter-Chiplet Cache-Coherent ..."

Zhiqiang Chen et al. (2026)

> Home

Details and statistics

DOI: 10.1109/HPCA68181.2026.11408455

access: closed

type: Conference or Workshop Paper

metadata version: 2026-03-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/hpca/ChenFWZ26
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/hpca/ChenFWZ26
Zhiqiang Chen, Wenwen Fu, Yongwen Wang, Hongwei Zhou:
A Deadlock-Free Bridge Module for Inter-Chiplet Cache-Coherent Communication in an Open Chiplet Ecosystem. HPCA 2026: 1-13

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.