"Netlist-level IP protection by watermarking for LUT-based FPGAs."

Moritz Schmid, Daniel Ziener, Jürgen Teich (2008)

> Home

Details and statistics

DOI: 10.1109/FPT.2008.4762385

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpt/SchmidZT08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpt/SchmidZT08
Moritz Schmid, Daniel Ziener, Jürgen Teich:
Netlist-level IP protection by watermarking for LUT-based FPGAs. FPT 2008: 209-216

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.