"Hardware/Software Co-Design of RISC-V Extensions for Accelerating Sparse ..."

Muhammad Sabih et al. (2024)

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DOI: 10.1109/ICFPT64416.2024.11113397

access: closed

type: Conference or Workshop Paper

metadata version: 2025-09-02

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Muhammad Sabih, Abrarul Karim, Jakob Wittmann, Frank Hannig, Jürgen Teich:
Hardware/Software Co-Design of RISC-V Extensions for Accelerating Sparse DNNs on FPGAs. ICFPT 2024: 1-9

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