"Identifying FPGA IP-Cores Based on Lookup Table Content Analysis."

Daniel Ziener, Stefan Assmus, Jürgen Teich (2006)

> Home

Details and statistics

DOI: 10.1109/FPL.2006.311255

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpl/ZienerAT06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpl/ZienerAT06
Daniel Ziener, Stefan Assmus, Jürgen Teich:
Identifying FPGA IP-Cores Based on Lookup Table Content Analysis. FPL 2006: 1-6

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.