"Four-Input Lookup Table (LUT4) and Architectural Enhancements Enable Power ..."

Satwant Singh et al. (2025)

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DOI: 10.1109/FPL68686.2025.00043

access: closed

type: Conference or Workshop Paper

metadata version: 2026-03-31

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Satwant Singh, Michael Schneider, Ziad Aboud, Jonathan Peterson, Senani Gunaratna, Ting Yew, Cindy Lee, Rick Crotty:
Four-Input Lookup Table (LUT4) and Architectural Enhancements Enable Power Efficient Mid-Range FPGAs. FPL 2025: 254-262

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