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"A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAs."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Toshiaki Miyazaki et al. (1994)

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DOI: 10.1007/3-540-58419-6_72

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-20

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  dblp key:
  - conf/fpl/MiyazakiNTYO94
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  persistent URL:
  - https://dblp.org/rec/conf/fpl/MiyazakiNTYO94
Toshiaki Miyazaki, Hiroshi Nakada, Akihiro Tsutsui, Kazuhisa Yamada, Naohisa Ohta:
A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAs. FPL 1994: 89-98

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