"A preamplifier circuit with offset-voltage control technique for 50-Gb/s ..."

Masaya Miyabe et al. (2022)

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DOI: 10.1109/ICEIC54506.2022.9748531

access: closed

type: Conference or Workshop Paper

metadata version: 2026-04-07

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Masaya Miyabe, Toshiyuki Inoue, Masataka Inoue, Shinya Nakashioya, Akira Tsuchiya, Keiji Kishine:
A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver. ICEIC 2022: 1-4

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