"5-Gb/s PAM4 Transmitter IC Using Compensation Circuit in an 180-nm CMOS."

Yudai Ichii et al. (2021)

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DOI: 10.1109/ICEIC51217.2021.9369819

access: closed

type: Conference or Workshop Paper

metadata version: 2026-04-07

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Yudai Ichii, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine:
5-Gb/s PAM4 Transmitter IC Using Compensation Circuit in an 180-nm CMOS. ICEIC 2021: 1-4

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