"Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings ..."

Bibhash Sen et al. (2010)

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DOI: 10.1109/DSD.2010.114

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Bibhash Sen, Anik Sengupta, Mamata Dalui, Biplab K. Sikdar:
Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit. DSD 2010: 613-620

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