"In-place LUT polarity inVersion to mitigate soft errors for FPGAs."

Juexiao Su et al. (2016)

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DOI: 10.1109/DFT.2016.7684074

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Juexiao Su, Ju-Yueh Lee, Chang Wu, Lei He:
In-place LUT polarity inVersion to mitigate soft errors for FPGAs. DFT 2016: 81-86

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