"FPGA architecture of multi-codeword LDPC decoder with efficient BRAM ..."

Sergiu Nimara et al. (2016)

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DOI: 10.1109/DDECS.2016.7482452

access: closed

type: Conference or Workshop Paper

metadata version: 2019-01-15

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Sergiu Nimara, Oana Boncalo, Alexandru Amaricai, Mircea Popa:
FPGA architecture of multi-codeword LDPC decoder with efficient BRAM utilization. DDECS 2016: 52-55

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