"A generic topology selection method for analog circuits with embedded ..."

Andreas Gerlach et al. (2017)

> Home

Details and statistics

DOI: 10.23919/DATE.2017.7927115

access: closed

type: Conference or Workshop Paper

metadata version: 2017-08-14

- view
  authority control:
- export record
  dblp key:
  - conf/date/GerlachSRE17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/date/GerlachSRE17
Andreas Gerlach, Jürgen Scheible, Thoralf Rosahl, Frank-Thomas Eitrich:
A generic topology selection method for analog circuits with embedded circuit sizing demonstrated on the OTA example. DATE 2017: 898-901

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.