"SABER: Selection of Approximate Bits for the Design of Error Tolerant ..."

Deepashree Sengupta et al. (2017)

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DOI: 10.1145/3061639.3062314

access: closed

type: Conference or Workshop Paper

metadata version: 2025-11-20

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Deepashree Sengupta, Farhana Sharmin Snigdha, Jiang Hu, Sachin S. Sapatnekar:
SABER: Selection of Approximate Bits for the Design of Error Tolerant Circuits. DAC 2017: 72:1-72:6

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