"A Scalable and Low-Power FPGA-Aware Network-on-Chip Architecture."

Somnath Mazumdar et al. (2017)

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DOI: 10.1007/978-3-319-61566-0_37

access: closed

type: Conference or Workshop Paper

metadata version: 2020-12-29

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Somnath Mazumdar, Alberto Scionti, Antoni Portero, Jan Martinovic, Olivier Terzo:
A Scalable and Low-Power FPGA-Aware Network-on-Chip Architecture. CISIS 2017: 407-420

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