"On Current Testing of Josephson Logic Circuits Using the 4JL Gate Family."

Teruhiko Yamada, Tsuyoshi Sasaki (1996)

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DOI: 10.1109/ATS.1996.555158

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Teruhiko Yamada, Tsuyoshi Sasaki:
On Current Testing of Josephson Logic Circuits Using the 4JL Gate Family. Asian Test Symposium 1996: 189-

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