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"74% Power Reduction in Bundled Data Circuits Thanks to Clock Gating ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Adrien Godard et al. (2026)

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DOI: 10.1109/ASYNC69614.2026.00023

access: closed

type: Conference or Workshop Paper

metadata version: 2026-07-14

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  dblp key:
  - conf/async/GodardWEF26
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  persistent URL:
  - https://dblp.org/rec/conf/async/GodardWEF26
Adrien Godard, Robin Wilson, Sylvain Engels, Laurent Fesquet:
74% Power Reduction in Bundled Data Circuits Thanks to Clock Gating Integration. ASYNC 2026: 92-96

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