"A 300-GHz-Band 36-Gb/s Scalable 2x2 2D Phased-Array CMOS Receiver."

Satoshi Tanaka et al. (2024)

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DOI: 10.1109/A-SSCC60305.2024.10849080

access: closed

type: Conference or Workshop Paper

metadata version: 2025-09-26

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Satoshi Tanaka, Shinsuke Hara, Kyoya Takano, Akifumi Kasamatsu, Yoshiki Sugimoto, Kunio Sakakibara, Shunichi Kubo, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
A 300-GHz-Band 36-Gb/s Scalable 2x2 2D Phased-Array CMOS Receiver. A-SSCC 2024: 1-3

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