"System Co-Design and Co-Analysis Approach to Implementing the XDR Memory ..."

Wai-Yeung Yip et al. (2007)

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DOI: 10.1109/ASPDAC.2007.358097

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  - https://dblp.org/rec/conf/aspdac/YipBBS07
Wai-Yeung Yip, Scott Best, Wendemagegnehu T. Beyene, Ralf Schmitt:
System Co-Design and Co-Analysis Approach to Implementing the XDR Memory System of the Cell Broadband Engine Processor; Realizing 3.2 Gbps Data Rate per Memory Lane in Low Cost, High Volume Production. ASP-DAC 2007: 858-865

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