"Area-minimal algorithm for LUT-based FPGA technology mapping with ..."

Chi-Chou Kao, Yen-Tai Lai (2004)

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DOI: 10.1109/ASPDAC.2004.54

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Chi-Chou Kao, Yen-Tai Lai:
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction. ASP-DAC 2004: 719-724

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