"A Performance Maximization Algorithm to Design ASIPs under the Constraint ..."

Nguyen-Ngoc Bình, Masaharu Imai, Yoshinori Takeuchi (1998)

> Home

Details and statistics

DOI: 10.1109/ASPDAC.1998.669502

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/aspdac/BinhIT98
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/aspdac/BinhIT98
Nguyen-Ngoc Bình, Masaharu Imai, Yoshinori Takeuchi:
A Performance Maximization Algorithm to Design ASIPs under the Constraint of Chip Area Including RAM and ROM Sizes. ASP-DAC 1998: 367-372

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.