"VLSI interconnect delay analysis method for ramp input signal."

Nobuyuki Mihara, Goro Suzuki (2011)

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DOI: 10.1109/ASICON.2011.6157187

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-25

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Nobuyuki Mihara, Goro Suzuki:
VLSI interconnect delay analysis method for ramp input signal. ASICON 2011: 324-328

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