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"Towards Safe and Efficient Analog Circuit Design: Active Learning for ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Sezin Kircali Ata et al. (2024)

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DOI: 10.1109/APCCAS62602.2024.10808909

access: closed

type: Conference or Workshop Paper

metadata version: 2026-01-04

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Sezin Kircali Ata, Zhi-Hui Kong, Anusha James, Lile Cai, Kiat Seng Yeo, Khin Mi Mi Aung, Chuan Sheng Foo, Ashish James:
Towards Safe and Efficient Analog Circuit Design: Active Learning for Feasibility Region Exploration. APCCAS 2024: 193-197

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last updated on 2026-01-04 13:43 CET by the dblp team

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