"Fast modulo 2n-1 and 2n;1 adder using carry-chain on ..."

Laurent-Stéphane Didier, Luc Jaulmes (2013)

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DOI: 10.1109/ACSSC.2013.6810475

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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Laurent-Stéphane Didier, Luc Jaulmes:
Fast modulo 2ⁿ-1 and 2ⁿ;1 adder using carry-chain on FPGA. ACSSC 2013: 1155-1159

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