"A Reusable Hybrid RISC Processor with Programmable Instruction Set."

Hajer Najjar, Riad Bourguiba, Jaouhar Mouine (2018)

> Home

Details and statistics

DOI: 10.1109/SSD.2018.8570509

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/IEEEssd/NajjarBM18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/IEEEssd/NajjarBM18
Hajer Najjar, Riad Bourguiba, Jaouhar Mouine:
A Reusable Hybrid RISC Processor with Programmable Instruction Set. SSD 2018: 1028-1031

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.