"High-speed and low-power 2.5D I/O circuits for memory-logic-integration by ..."

Jiacheng Wang et al. (2013)

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DOI: 10.1109/3DIC.2013.6702326

access: closed

type: Conference or Workshop Paper

metadata version: 2025-07-31

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Jiacheng Wang, Shunli Ma, Sai Manoj Pudukotai Dinakarrao, Mingbin Yu, Roshan Weerasekera, Hao Yu:
High-speed and low-power 2.5D I/O circuits for memory-logic-integration by through-silicon interposer. 3DIC 2013: 1-4

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