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"Intermediate BEOL process influence on power and performance for 3DVLSI."
Hossam Sarhan et al. (2015)
- Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Deprat, Alexandre Ayres De Sousa, Perrine Batude, Claire Fenouillet-Béranger, Fabien Clermidy:

Intermediate BEOL process influence on power and performance for 3DVLSI. 3DIC 2015: TS1.3.1-TS1.3.5

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