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ORCIDChia-Yu Hsu 0003
Person information
- affiliation: Yuan Ze University, Department of Information Mangement, Chungli, Taiwan
- affiliation: National Tsing Hua University, Department of Industrial Engineering and Engineering Management, Hsinchu, Taiwan
Other persons with the same name
- Chia-Yu Hsu (aka: Chiayu Hsu) — disambiguation page
- Chia-Yu Hsu 0001
![[0000-0002-8923-1213]](https://devdomain4test.ir/img/orcid-mark.12x12.png "0000-0002-8923-1213")
— Arizona State University, School of Geographical Sciences and Urban Planning, Spatial Analysis Research Center (SPARC), Tempe, AZ, USA - Chia-Yu Hsu 0002 — Kyoto University, Graduate School of Informatics, Kyoto, Japan
- Chia-Yu Hsu 0004 — National Taiwan University, Graduate Institute of Communication Engineering, Taipei, Taiwan (and 1 more)
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2020 – today
- 2024
[j13]Runliang Dou, Guofang Nan, Ziqian Wei, Chia-Yu Hsu:
Value co-creation in group enterprises: an evolutionary game theory-based analysis. Int. J. Prod. Res. 62(17): 6186-6210 (2024)- [j12]Runliang Dou, Kuo-Yi Lin, Chia-Yu Hsu, Mohammad T. Khasawneh:
Guest editorial: Value chain collaboration for complicated product innovation and manufacturing excellence by industrial data-driven modeling and optimization. Ind. Manag. Data Syst. 124(11): 2989-2991 (2024) - 2021
- [j11]Qiuhong Zhao, Runliang Dou, Kuo-Yi Lin, Chia-Yu Hsu:
Applications of new industrial engineering methodologies. Comput. Ind. Eng. 159: 107479 (2021)
2010 – 2019
- 2018
- [j10]Runliang Dou, Zhen He, Chia-Yu Hsu:
Foreword: Smart manufacturing, innovative product and service design to empower Industry 4.0. Comput. Ind. Eng. 125: 514-516 (2018) - [j9]Runliang Dou, Chen-Fu Chien, Imed Kacem, Chia-Yu Hsu:
Industry Applications of Computational Intelligence: Preface. Int. J. Comput. Intell. Syst. 11(1): 803-804 (2018) - 2016
- [j8]Chen-Fu Chien, Chia-Yu Hsu, James R. Morrison, Runliang Dou:
Semiconductor manufacturing intelligence and automation. Comput. Ind. Eng. 99: 315-317 (2016) - 2015
- [j7]Chen-Fu Chien, Ying-Jen Chen, Chia-Yu Hsu:
A novel approach to hedge and compensate the critical dimension variation of the developed-and-etched circuit patterns for yield enhancement in semiconductor manufacturing. Comput. Oper. Res. 53: 309-318 (2015) - 2014
- [j6]Chen-Fu Chien, Mitsuo Gen, Yongjiang Shi, Chia-Yu Hsu:
Manufacturing intelligence and innovation for digital manufacturing and operational excellence. J. Intell. Manuf. 25(5): 845-847 (2014) - [j5]Chen-Fu Chien, Ying-Jen Chen, Chia-Yu Hsu, Hung-Kai Wang:
Overlay Error Compensation Using Advanced Process Control With Dynamically Adjusted Proportional-Integral R2R Controller. IEEE Trans Autom. Sci. Eng. 11(2): 473-484 (2014) - 2013
- [j4]Chen-Fu Chien, Chia-Yu Hsu, Kuo-Hao Chang:
Overall Wafer Effectiveness (OWE): A novel industry standard for semiconductor ecosystem as a whole. Comput. Ind. Eng. 65(1): 117-127 (2013) - 2012
- [j3]Chen-Fu Chien, Chia-Yu Hsu, Chih-Wei Hsiao:
Manufacturing intelligence to forecast and reduce semiconductor cycle time. J. Intell. Manuf. 23(6): 2281-2294 (2012) - 2011
- [j2]Chen-Fu Chien, Chia-Yu Hsu:
UNISON analysis to model and reduce step-and-scan overlay errors for semiconductor manufacturing. J. Intell. Manuf. 22(3): 399-412 (2011) - [c1]Chen-Fu Chien, Ying-Jen Chen, Chia-Yu Hsu, Yi-Hao Yeh:
Manufacturing intelligence for determining machine subgroups to enhance yield in semiconductor manufacturning. WSC 2011: 1898-1907
2000 – 2009
- 2006
- [j1]Chen-Fu Chien, Chia-Yu Hsu:
A novel method for determining machine subgroups and backups with an empirical study for semiconductor manufacturing. J. Intell. Manuf. 17(4): 429-439 (2006)
Coauthor Index
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