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Mohammadnavid Tarighat

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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2026
[c5]
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  - https://dblp.org/rec/conf/glvlsi/GubbiTPNRH26
Kevin Immanuel Gubbi, Mohammadnavid Tarighat, Brinda Puri, Mahdi Pirayesh Shirazi Nejad, Setareh Rafatirad, Houman Homayoun:
HALO: A Typed Multi-View Graph Abstraction for RTL and Netlist Learning. ACM Great Lakes Symposium on VLSI 2026: 576-582
[c4]
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Noah Marosok, Marcus Halm, Kevin Immanuel Gubbi, Mohammadnavid Tarighat, Neusha Javidnia, Soheil Zibakhsh Shabgahi, Ke Huang, Setareh Rafatirad, Hossein Sayadi, Farinaz Koushanfar, Houman Homayoun:
Agentic AI for Chip Design Verification: Failure Modes, Metrics, and Coverage Closure. ISQED 2026: 1-7
[c3]
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Mohammadnavid Tarighat, Kevin Immanuel Gubbi, Neusha Javidnia, Noah Marosok, Soheil Zibakhsh Shabgahi, Marcus Halm, Mahdi Pirayesh Shirazi Nejad, Setareh Rafatirad, Farinaz Koushanfar, Houman Homayoun:
Closing the Loop: Overcoming the Tool-Feedback Gap in Agentic Hardware Design. ISQED 2026: 1-8
2025
[c2]
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Kevin Immanuel Gubbi, Mohammadnavid Tarighat, Arvind Sudarshan, Inderpreet Kaur, Pavan Dheeraj Kota, Avesta Sasan, Houman Homayoun:
State of Hardware Fuzzing: Current Methods and the Potential of Machine Learning and Large Language Models. ISQED 2025: 1-7
[c1]
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Kevin Immanuel Gubbi, Marcus Halm, Sarbani Kumar, Arvind Sudarshan, Pavan Dheeraj Kota, Mohammadnavid Tarighat, Avesta Sasan, Houman Homayoun:
Prompting for Power: Benchmarking Large Language Models for Low-Power RTL Design Generation. MLCAD 2025: 1-7

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last updated on 2026-07-06 02:48 CEST by the dblp team

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