Design planning for high-performance ASICs.

Mon, 01 Jan 1996 00:00:00 +0100

John Y. Sayah, Rajesh Gupta, Deepak D. Sherlekar, Philip S. Honsinger, Jitendra M. Apte, S. Wayne Bollinger, Hai Hsia Chen, Sumit DasGupta, Edward P. Hsieh, Andrew D. Huber, Edward J. Hughes, Zahi M. Kurzum, Vasant B. Rao, Thepthai Tabtieng, Vigen Valijan, David Y. Yang:
Design planning for high-performance ASICs. IBM J. Res. Dev. 40(4): 431-452 (1996)