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2020 – today
- 2026
[j5]Lingyun Yao
, Shirui Zhao, Martin Trapp, Jelin Leslin, Marian Verhelst, Martin Andraud:
LogSumExp: Efficient Approximate Logarithm Acceleration for Embedded Tractable Probabilistic Reasoning. IEEE Trans. Circuits Syst. I Regul. Pap. 73(3): 1944-1955 (2026)- [c8]Lingyun Yao, Shirui Zhao, Marian Verhelst, Martin Andraud:
EinChip: A 4.6/1.5 TOPS/W 6/24b Log-compute Einsum-based Accelerator for Neuro Symbolic AI. CICC 2026: 1-4 - 2025
- [j4]Can Liu, Zhihao Shen, Wei Mao, Bo Li, Xiaomeng Lv, Fuyi Li, Peng Xiao, Haiqiao Hong, Shirui Zhao, Siying Zheng, Xiaoxi Li, Xiao Yu, Jiuren Zhou, Bing Chen, Yan Liu, Genquan Han:
A parallel computing-in-memory accelerator utilizing FeRAM array with retention loss correction. Sci. China Inf. Sci. 68(6) (2025) - [j3]Shirui Zhao, Nimish Shah, Wannes Meert, Marian Verhelst:
AIA: A Customized Multi-Core RISC-V SoC for Discrete Sampling Workloads in 16 nm. IEEE J. Solid State Circuits 60(7): 2447-2460 (2025) - [i2]Shirui Zhao, Jun Yin, Lingyun Yao, Martin Andraud, Wannes Meert, Marian Verhelst:
MC2A: Enabling Algorithm-Hardware Co-Design for Efficient Markov Chain Monte Carlo Acceleration. CoRR abs/2507.12935 (2025) - 2024
- [c7]Jonas Crols, Guilherme Paim, Shirui Zhao, Marian Verhelst:
TreeGRNG: Binary Tree Gaussian Random Number Generator for Efficient Probabilistic AI Hardware. DATE 2024: 1-6 - 2023
- [c6]Shirui Zhao, Zhiqing Wei:
Terahertz MIMO Enhanced Sensing DFT-s-OFDM Radar. ICCT 2023: 467-472 - 2022
- [j2]Haoran Lyu, Fengwei An, Shirui Zhao, Wei Mao, Hao Yu:
A 703.4-GOPs/W Binary SegNet Processor With Computing-Near-Memory Architecture for Road Detection. IEEE Des. Test 39(2): 74-83 (2022) - [j1]Nimish Shah, Laura Isabel Galindez Olascoaga, Shirui Zhao, Wannes Meert, Marian Verhelst:
DPU: DAG Processing Unit for Irregular Graphs With Precision-Scalable Posit Arithmetic in 28 nm. IEEE J. Solid State Circuits 57(8): 2586-2596 (2022) - [c5]Shirui Zhao, Nimish Shah, Wannes Meert, Marian Verhelst:
Discrete Samplers for Approximate Inference in Probabilistic Machine Learning. DATE 2022: 1221-1226 - 2021
- [c4]Wei Mao, Kai Li, Xinang Xie, Shirui Zhao, He Li, Hao Yu:
A Reconfigurable Multiple-Precision Floating-Point Dot Product Unit for High-Performance Computing. DATE 2021: 1793-1798 - [c3]Nimish Shah, Laura Isabel Galindez Olascoaga, Shirui Zhao, Wannes Meert, Marian Verhelst:
9.4 PIU: A 248GOPS/W Stream-Based Processor for Irregular Probabilistic Inference Networks Using Precision-Scalable Posit Arithmetic in 28nm. ISSCC 2021: 150-152 - [i1]Nimish Shah, Laura Isabel Galindez Olascoaga, Shirui Zhao, Wannes Meert, Marian Verhelst:
DPU: DAG Processing Unit for Irregular Graphs with Precision-Scalable Posit Arithmetic in 28nm. CoRR abs/2112.05660 (2021) - 2020
- [c2]Wei Mao, Zhihua Xiao, Peng Xu, Hongwei Ren, Dingbang Liu, Shirui Zhao, Fengwei An, Hao Yu:
Energy-Efficient Machine Learning Accelerator for Binary Neural Networks. ACM Great Lakes Symposium on VLSI 2020: 77-82
2010 – 2019
- 2019
- [c1]Shirui Zhao, Fengwei An, Hao Yu:
A 307-fps 351.7-GOPs/W Deep Learning FPGA Accelerator for Real-Time Scene Text Recognition. FPT 2019: 263-266
Coauthor Index
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