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Conference and Workshop Papers
- 2024
[c12]Rohit Dureja, Jason Baumgartner, Raj Kumar Gajavelly
, Robert Kanzelman, Kristin Y. Rozier:
Toward Exhaustive Sequential Redundancy Removal. FMCAD 2024: 217-226- 2020
- [c11]Rohit Dureja, Jason Baumgartner, Robert Kanzelman, Mark Williams, Kristin Y. Rozier:
Accelerating Parallel Verification via Complementary Property Partitioning and Strategy Exploration. FMCAD 2020: 16-25 - 2019
- [c10]Rohit Dureja, Jason Baumgartner, Alexander Ivrii, Robert Kanzelman, Kristin Y. Rozier:
Boosting Verification Scalability via Structural Grouping and Semantic Partitioning of Properties. FMCAD 2019: 1-9 - [c9]Raj Kumar Gajavelly, Jason Baumgartner, Alexander Ivrii, Robert L. Kanzelman, Shiladitya Ghosh:
Input Elimination Transformations for Scalable Verification and Trace Reconstruction. FMCAD 2019: 10-18 - 2016
- [c8]Pradeep Kumar Nalla, Raj Kumar Gajavelly, Jason Baumgartner, Hari Mony, Robert Kanzelman, Alexander Ivrii:
The art of semi-formal bug hunting. ICCAD 2016: 51 - 2014
- [c7]Pradeep Kumar Nalla, Raj Kumar Gajavelly, Hari Mony, Jason Baumgartner, Robert Kanzelman:
Effective Liveness Verification Using a Transformation-Based Framework. VLSID 2014: 74-79 - 2011
- [c6]Michael L. Case, Jason Baumgartner, Hari Mony, Robert Kanzelman:
Optimal redundancy removal without fixedpoint computation. FMCAD 2011: 101-108 - [c5]Michael L. Case, Jason Baumgartner, Hari Mony, Robert Kanzelman:
Approximate reachability with combined symbolic and ternary simulation. FMCAD 2011: 109-115 - 2009
- [c4]Michael L. Case, Hari Mony, Jason Baumgartner, Robert Kanzelman:
Enhanced verification by temporal decomposition. FMCAD 2009: 17-24 - 2006
- [c3]Jason Baumgartner, Hari Mony, Viresh Paruthi, Robert Kanzelman, Geert Janssen:
Scalable Sequential Equivalence Checking across Arbitrary Design Transformations . ICCD 2006: 259-266 - 2005
- [c2]Hari Mony, Jason Baumgartner, Viresh Paruthi, Robert Kanzelman:
Exploiting suspected redundancy without proving it. DAC 2005: 463-466 - 2004
- [c1]Hari Mony, Jason Baumgartner, Viresh Paruthi, Robert Kanzelman, Andreas Kuehlmann:
Scalable Automated Verification via Expert-System Guided Transformations. FMCAD 2004: 159-173
Coauthor Index
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