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ORCIDZhiliang Hong
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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Other persons with the same name
- Zhiliang Hong 0001
![[0000-0002-9968-5964]](https://devdomain4test.ir/img/orcid-mark.12x12.png "0000-0002-9968-5964")
— Fudan University, Key Laboratory of Integrated Chips and Systems, Shanghai, China - Zhiliang Hong 0002 — Fujian Medical University, Shengli Clinical Medical College, Fujian, China (and 1 more)
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2020 – today
- 2026
[c27]Zihao Xia, Chenghao Liu, Zhiliang Hong, Yumei Huang:
A 6.12-to-8.62GHz Class-F23 VCO with Series-LC Assistance Achieving 195.9dBc/Hz FoMT at 100kHz Offset. ISCAS 2026: 1387-1391
2010 – 2019
- 2019
- [c26]Hejia Cai, Yan Hu, Zhiliang Hong:
A35.2 dBm CMOS RF Power Amplifier Using an 8-Way Current-Voltage Combining Transformer with Harmonic Control. ASICON 2019: 1-4 - [c25]Mingfeng Chen, Fuqiang Liu, Heng Ma, Zhiliang Hong:
High-Bandwidth Wide-Output-Swing Linear Amplifier for LTE-100MHz Envelope Tracking. ASICON 2019: 1-4 - [c24]Yan Hu, Tao Wang, Zhiliang Hong:
The Digital Front End with Dual-box Digital Pre-distortion in All-digital Quadrature Transmitter. ASICON 2019: 1-4 - [c23]Fuqiang Liu, Mingfeng Chen, Heng Ma, Zhiliang Hong:
Dual-Loop-Controlled AC-Coupling 100MHz Bandwidth Envelope Tracking Modulator for 5G RF Power Amplifier. ASICON 2019: 1-4 - [c22]Dehong Lv, Heng Ma, Fuqiang Liu, Zhiliang Hong:
A curvature corrected bandgap reference with mismatch cancelling and noise reduction. ASICON 2019: 1-4 - [c21]Tao Wang, Hejia Cai, Yan Hu, Pan Xue, Zhiliang Hong:
A Compact Quadrature Doherty Digital Power Amplifier with Backoff Efficiency Enhancement. ASICON 2019: 1-3 - 2018
- [j5]Wenlong Lyu, Pan Xue, Fan Yang, Changhao Yan, Zhiliang Hong, Xuan Zeng, Dian Zhou:
An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1954-1967 (2018) - [c20]Jianguo Yang, Xing Li, Tao Wang, Xiaoyong Xue, Zhiliang Hong, Yuanyuan Wang, David Wei Zhang, Hongliang Lu:
A Physically Unclonable Function with BER < 0.35% for Secure Chip Authentication Using Write Speed Variation of RRAM. ESSDERC 2018: 54-57 - [c19]Pan Xue, Haijun Shao, Dan Fang, Gan Guo, Wei Che, Zhiliang Hong:
A Digital ΣΔ Modulated Class-S Transmitter with Two-Step Up-conversion and Filter-less Front End. ISOCC 2018: 27-28 - [c18]Yuan Gao, Zhiliang Hong, Axel Thomsen:
Session 8 overview: Wireless power and harvesting: Power management subcommittee. ISSCC 2018: 134-135 - 2017
- [c17]Chenyang Wang, Yilei Shen, Pan Xue, Zhiliang Hong:
The implement of digital front end in all-digital quadrature RF transmitter. ASICON 2017: 900-903 - [c16]Hongguang Zhang, Pan Xue, Zhiliang Hong:
A 4.6-5.6 GHz constant KVCO low phase noise LC-VCO and an optimized automatic frequency calibrator applied in PLL frequency synthesizer. IECON 2017: 8337-8342 - [e1]Yajie Qin, Zhiliang Hong, Ting-Ao Tang:
12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017. IEEE 2017, ISBN 978-1-5090-6625-4 [contents] - 2015
- [c15]Yanqin Chen, Hongguang Zhang, Xu Guo, Zhiliang Hong:
A 400mV supply voltage self-start clock generator for energy harvest system. ASICON 2015: 1-3 - 2014
- [c14]Danzhu Lu, Yao Qian, Zhiliang Hong:
4.3 An 87%-peak-efficiency DVS-capable single-inductor 4-output DC-DC buck converter with ripple-based adaptive off-time control. ISSCC 2014: 82-83 - 2013
- [c13]Qiuli Li, Yao Qian, Danzhu Lu, Zhiliang Hong:
VCCS controlled LDO with small on-chip capacitor. ASICON 2013: 1-4 - 2012
- [j4]Yi Zhao, Shenjie Wang, Zhiliang Hong:
A sub-sampling 4.25 GS/s 3-bit flash ADC with asymmetric spatial filter response. Microelectron. J. 43(6): 337-344 (2012) - [c12]Danzhu Lu, Jiale Yu, Zhiliang Hong, Jingwen Mao, Hui Zhao, Eric Cirot:
A 10MHz ripple-based on-time controlled buck converter with dual ripple compensation and real-time efficiency optimization. ESSCIRC 2012: 333-336 - 2011
- [c11]Yi Zhao, Jun Jiang, Ke Shao, Yajie Qin, Zhiliang Hong:
A low-power 4.224GS/s sampler in 0.13-µm CMOS for IR UWB receiver. ASICON 2011: 512-515 - [c10]Chunchen Gu, Yi Zhao, Zhiliang Hong:
A 4GS/s 3b two-way time-interleaved ADC in 0.13um CMOS. ASICON 2011: 1002-1005 - [c9]Xingli Huang, Xi Qin, Yajie Qin, Hao Fang, Zhiliang Hong:
A 0.8-3GHz 40dB dynamic range CMOS variable-gain amplifier. ASICON 2011: 1030-1033 - [c8]Nan Lin, Fei Fang, Zhiliang Hong, Hao Fang:
A CMOS broadband precise programmable gain amplifier with bandwidth extension technique. A-SSCC 2011: 225-228 - [c7]Weiwei Xu, Ye Li, Zhiliang Hong, Dirk Killat, Horst Schleifer:
A single-inductor multiple-bipolar-output (SIMBO) converter with fully-adaptive feedback matrix and improved light-load ripple. ESSCIRC 2011: 435-438 - [c6]Weiwei Xu, Ye Li, Zhiliang Hong, Dirk Killat:
A 90% peak efficiency single-inductor dual-output buck-boost converter with extended-PWM control. ISSCC 2011: 394-396 - 2010
- [j3]Wei-yang Xu, Bo Lu, Xing-bo Hu, Zhi-Liang Hong:
Blind carrier frequency offset estimation for constant modulus signaling based OFDM systems: algorithm, identifiability, and performance analysis. J. Zhejiang Univ. Sci. C 11(1): 14-26 (2010) - [c5]Weiyang Xu, Zhiliang Hong:
Blind CFO Estimation for Constant Modulus Signaling Based OFDM Systems. ICC 2010: 1-5 - [c4]Shenjie Wang, Zhiliang Hong:
Design of 4-bit parallel sub-sampling A/D converter for IR-UWB receiver. ICECS 2010: 1049-1052
2000 – 2009
- 2009
- [c3]Weiwei Xu, Ye Li, Xiaohan Gong, Zhiliang Hong, Dirk Killat:
A single-inductor dual-output switching converter with low ripples and improved cross regulation. CICC 2009: 303-306 - 2008
- [c2]Feng Zhao, Xiaoping Gao, Huajiang Zhang, Kangmin Hu, Zhiliang Hong:
A CMOS 434/868 MHz FSK/OOK transmitter with integrated fractional-N PLL. APCCAS 2008: 546-549 - [c1]Weiwei Xu, Xiaoting Zhu, Zhiliang Hong, Dirk Killat:
Design of single-inductor dual-output switching converters with average current mode control. APCCAS 2008: 902-905 - 2004
- [j2]Quanping Huang, Rongzheng Zhou, Zhiliang Hong:
Low memory and low complexity VLSI implementation of JPEG2000 codec. IEEE Trans. Consumer Electron. 50(2): 638-646 (2004) - 2002
- [j1]Xiao-Jun Zeng, Zhi-Liang Hong:
Design and implementation of a turbo decoder for 3G W-CDMA systems. IEEE Trans. Consumer Electron. 48(2): 284-291 (2002)
Coauthor Index
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