default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDJournal of Instruction-Level Parallelism, Volume 6
Volume 6, 2004
- Harold W. Cain, Mikko H. Lipasti, Ravi Nair:
Constraint Graph Analysis of Multithreaded Programs. - Dong-yuan Chen, Lixia Liu, Roy Dz-Ching Ju, Chen Fu, Shuxin Yang, Chengyong Wu:
Efficient Modeling of Itanium Architecture during Instruction Scheduling using Extended Finite State Automata. - Phuong Hoai Ha, Philippas Tsigas:
Reactive Multi-word Synchronization for Multiprocessors. - Toshiaki Yasue, Toshio Suganuma, Hideaki Komatsu, Toshio Nakatani:
Structural Path Profiling: An Efficient Online Path Profiling Framework for Just-In-Time Compilers.
- Jiwei Lu, Howard Chen, Pen-Chung Yew, Wei-Chung Hsu:
Design and Implementation of a Lightweight Dynamic Optimization System. - Romain Dolbeau, André Seznec:
CASH: Revisiting Hardware Sharing in Single-Chip Parallel Processors. - Abdel-Hameed A. Badawy, Aneesh Aggarwal, Donald Yeung, Chau-Wen Tseng:
The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems. - Volker Strumpen, Henry Hoffmann, Anant Agarwal:
Stream Algorithms and Architecture. - Diego Puppin, Mark Stephenson, Saman P. Amarasinghe:
Convergent Scheduling. - Lu Peng, Jih-Kwon Peir, Konrad Lai:
A New Address-Free Memory Hierarchy Layer for Zero-Cycle Load.
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2026-06-25 00:54 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
