


default search action
21st SLIP 2019: Las Vegas, NV, USA
- 21st ACM/IEEE International Workshop on System Level Interconnect Prediction, SLIP 2019, Las Vegas, NV, USA, June 1-2, 2019. IEEE 2019, ISBN 978-1-7281-2818-4

- Boris Vaisband, Subramanian S. Iyer:

Communication Considerations for Silicon Interconnect Fabric. 1-6 - Longfei Wang, Ragh Kuttappa, Baris Taskin, Selçuk Köse

:
Distributed Digital Low-Dropout Regulators with Phase Interleaving for On-Chip Voltage Noise Mitigation. 1-5 - Farid Kenarangi, Inna Partin-Vaisband:

Security Network On-Chip for Mitigating Side-Channel Attacks. 1-6 - Yiming Wen, Sayyed Farid Ahamed, Weize Yu:

A Novel PUF Architecture Against Non-Invasive Attacks. 1-5 - Chak-Wa Pui, Gang Wu, Freddy Y. C. Mang, Evangeline F. Y. Young:

An Analytical Approach for Time-Division Multiplexing Optimization in Multi-FPGA based Systems. 1-8 - Zheng Xu, Jacob Abraham:

FSNoC: Safe Network-on-Chip Design with Packet Level Lock Stepping. 1-6 - M. Ali Vosoughi, Longfei Wang, Selçuk Köse

:
Bus-Invert Coding as a Low-Power Countermeasure Against Correlation Power Analysis Attack. 1-5 - Dylan C. Stow, Itir Akgun, Yuan Xie:

Investigation of Cost-Optimal Network-on-Chip for Passive and Active Interposer Systems. 1-8

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID














