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ORCIDRAPIDO@HiPEAC 2024: Munich, Germany
- Lilia Zaourar, Daniel Chillet, Daniel Gracia Pérez, Morteza Biglari-Abhari, Réda Nouacer
, Matthias Jung, Gianluca Palermo:
Proceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design, RAPIDO 2024, Munich, Germany, 18 January 2024. ACM 2024 - João N. Matos, João Bispo, Luís Miguel Sousa:
A C Subset for Ergonomic Source-to-Source Analyses and Transformations. 1-8 - Vincent Fu, Lilia Zaourar, Alix Munier Kordon, Marc Duranton:
Design Space Exploration of HPC Systems with Random Forest-based Bayesian Optimization. 9-15 - Nils Bosbach, Alwalid Salama, Lukas Jünger, Mark Burton, Niko Zurstraßen, Rebecca Pelke, Rainer Leupers:
NQC²: A Non-Intrusive QEMU Code Coverage Plugin. 16-21 - Mirco Mannino, Yinting Huang, Biagio Peccerillo, Alessio Medaglini, Sandro Bartolini:
Integration of RISC-V Page Table Walk in gem5 SE Mode. 22-28 - Elias Perdomo, Alexander Kropotov, Francelly Katherine Cano Ladino, Syed Zafar, Teresa Cervero, Xavier Martorell Bofill, Behzad Salami:
Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs. 29-34 - Fabian Schätzle, Carlos Falquez, Stefan Heinen, Nam Ho, Antoni Portero, Estela Suarez, Johannes Van Den Boom, Stefan van Waasen:
Modeling methodology for multi-die chip design based on gem5/SystemC co-simulation. 35-41 - Miguel Henriques, João Bispo, Nuno Paulino:
Using Source-to-Source to Target RISC-V Custom Extensions: UVE Case-Study. 42-50
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