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ORCID46th ISMVL 2016: Sapporo, Japan
- 46th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2016, Sapporo, Japan, May 18-20, 2016. IEEE Computer Society 2016, ISBN 978-1-4673-9489-5
Invited Address I
- Takahiro Yamanoi:
Elucidation of Brain Activities by Electroencephalograms and Its Application to Brain Computer Interface. 1-4
Session 1A: Circuits I
- Daisuke Suzuki, Takahiro Hanyu:
Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme. 5-10 - Gopalakrishnan Sundararajan
, Chris Winstead:
CNTFET-RFB: An Error Correction Implementation for Multi-valued CNTFET Logic. 11-16 - Mona Moradi, Reza Faghih Mirzaee, Keivan Navi:
Ternary Versus Binary Multiplication with Current-Mode CNTFET-Based K-Valued Converters. 17-22 - Sunwoo Heo, Jinwoo Noh, Yun Ji Kim, So-Young Kim, Abdul Karim Khan, Byoung Hun Lee:
Design of Ratioless Ternary Inverter Using Graphene Barristor. 23-30
Session 1B: Synthesis of Reversible Circuits
- Zaid Al-Wardi, Robert Wille, Rolf Drechsler:
Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits. 31-36 - Linh Tran, Addison Gronquist, Marek A. Perkowski, John S. Caughman IV:
An Improved Factorization Approach to Reversible Circuit Synthesis Based on EXORs of Products of EXORs. 37-43 - Nils Przigoda, Gerhard W. Dueck, Robert Wille, Rolf Drechsler:
Fault Detection in Parity Preserving Reversible Circuits. 44-49 - Anupam Chattopadhyay, Luca Gaetano Amarù, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Notes on Majority Boolean Algebra. 50-55
Invited Address II
- Miki Haseyama:
Realization of Associative Image Search: Development of Image Retrieval Platform for Enhancing Serendipity. 56-59
Session 2A: Circuits II
- Hiroki Nakahara, Tsutomu Sasao, Hiroyuki Nakanishi, Kazumasa Iwai, Tohru Nagao, Naoya Ogawa:
An FFT Circuit Using Nested RNS in a Digital Spectrometer for a Radio Telescope. 60-65 - Yosuke Iijima, Yasushi Yuminaka:
Double-Rate Equalization Using Tomlinson-Harashima Precoding for Multi-valued Data Transmission. 66-71 - Naoto Sugaya, Masanori Natsui, Takahiro Hanyu:
Context-Based Error Correction Scheme Using Recurrent Neural Network for Resilient and Efficient Intra-Chip Data Transmission. 72-77
Session 2B: Clone
- Hajime Machida, Jovanka Pantovic:
Monomial Clones: Local Results and Global Properties. 78-83 - Hajime Machida, Ivo G. Rosenberg:
Centralizing Monoids on a Three-Element Set Related to Binary Idempotent Functions. 84-89 - Peter G. Jeavons, Andrius Vaicenavicius, Stanislav Zivný:
Minimal Weighted Clones with Boolean Support. 90-95
Session 3A: Index Generation Functions
- Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler:
An Efficient Heuristic for Linear Decomposition of Index Generation Functions. 96-101 - Helena Astola, Radomir S. Stankovic, Jaakko T. Astola:
Index Generation Functions Based on Linear and Polynomial Transformations. 102-106 - Jaakko T. Astola, Pekka Astola, Radomir S. Stankovic, Ioan Tabus:
An Algebraic Approach to Reducing the Number of Variables of Incompletely Defined Discrete Functions. 107-112 - Tsutomu Sasao:
A Realization of Index Generation Functions Using Multiple IGUs. 113-118
Session 3B: Algebra I
- Ivan Chajda, Jan Paseka:
Set Representation of Partial Dynamic De Morgan Algebras. 119-124 - Catalin Zara, Dan A. Simovici:
Tolerance Distances on Minimal Coverings. 125-130 - Norihiro Kamide:
Paraconsistent Double Negation That Can Simulate Classical Negation. 131-136 - Norihiro Kamide:
Cut-Free Systems for Restricted Bi-Intuitionistic Logic and Its Connexive Extension. 137-142
Invited Address III
- Shin-ichi Minato:
Power of Enumeration - BDD/ZDD-Based Techniques for Discrete Structure Manipulation. 143
Session 4A: From Reversible to Quantum Circuits
- Md. Mazder Rahman, Gerhard W. Dueck, Anupam Chattopadhyay, Robert Wille:
Integrated Synthesis of Linear Nearest Neighbor Ancilla-Free MCT Circuits. 144-149 - Nabila Abdessaied, Matthew Amy, Mathias Soeken, Rolf Drechsler:
Technology Mapping of Reversible Circuits to Clifford+T Quantum Circuits. 150-155 - Laxmidhar Biswal, Chandan Bandyopadhyay, Anupam Chattopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
Nearest-Neighbor and Fault-Tolerant Quantum Circuit Implementation. 156-161
Session 4B: Algebra II
- Michiro Kondo, Mayuka F. Kawaguchi:
Some Properties of Generalized State Operators on Residuated Lattices. 162-166 - Michiro Kondo:
Simple Characterizations of Perfect Residuated Lattices. 167-171
Invited Address IV
- Andrew Shorten, Wai Tung Ng:
SPRUCE, an Embedded Compact Stack Machine for IGBT Power Modules. 172-176
Session 5A: Intelligent Medical and Welfare Engineering
- Jianjun Chen, Noboru Takagi:
Gray-Scale Morphology Based Image Segmentation and Character Extraction Using SVM. 177-182 - Agung Setia Budi, Ryota Sakamoto, Hiroki Tamura, Koichi Tanno:
A Low-Voltage and Low-Power CMOS Temperature Sensor Circuit with Digital Output for Wireless Healthcare Monitoring System. 183-188 - Mizuki Higuchi, Ken-ichi Sorachi, Yutaka Hata:
Dependency Analysis of BMI in Health Checkup Blood Data. 189-193 - Zainul Abidin, Koichi Tanno, Shota Mago, Hiroki Tamura:
Novel Instrumentation Amplifier Architectures Insensitive to Resistor Mismatches and Offset Voltage for Biological Signal Processing. 194-199 - Ryuichi Murakami, Noriaki Muranaka:
Study Support System of Character Drawing Considering Feeling Evaluation. 200-204
Session 5B: Logic I
- Radomir S. Stankovic, Milena Stankovic, Jaakko T. Astola, Claudio Moraga:
Gibbs Characterization of Binary and Ternary Bent Functions. 205-210 - Elena Dubrova:
On Constructing Secure and Hardware-Efficient Invertible Mappings. 211-216 - Rei Ueno, Yukihiro Sugawara, Naofumi Homma, Takafumi Aoki:
Formal Design of Pipelined GF Arithmetic Circuits and Its Application to Cryptographic Processors. 217-222 - Shunsuke Koshita, Naoya Onizawa, Masahide Abe, Takahiro Hanyu, Masayuki Kawamata:
Realization of FIR Digital Filters Based on Stochastic/Binary Hybrid Computation. 223-228 - Claudio Moraga, Radomir S. Stankovic, Milena Stankovic:
The Pascal Triangle (1654), the Reed-Muller-Fourier Transform (1992), and the Discrete Pascal Transform (2005). 229-234
Session 6A: Quantum Gates and Quantum States
- Md Belayet Ali, Takashi Hirayama, Katsuhisa Yamanaka, Yasuaki Nishitani:
New Two-Qubit Gate Library with Entanglement. 235-240 - Claudio Moraga:
Quantum p-Valued Toffoli and Deutsch Gates with Conjunctive or Disjunctive Mixed Polarity Control. 241-246 - Philipp Niemann, Rhitam Datta, Robert Wille:
Logic Synthesis for Quantum State Generation. 247-252 - Martin Lukac, Aikaterini Mandilara:
Quantum Algorithmic Complexity of Three-Qubit Pure States. 253-257
Session 6B: Logic II
- Qiangfu Zhao:
A Study on Realizing Awareness Using 3VL-MLP. 258-263 - Bernd Steinbach, Stefan Heinrich, Christian Posthoff:
Multi-valued Problem Solvers. 264-269 - Joan Ramon Soler, Felip Manyà:
A Bit-Vector Approach to Satisfiability Testing in Finitely-Valued Logics. 270-275 - Debabani Chowdhury, Debesh K. Das, Bhargab B. Bhattacharya, Tsutomu Sasao:
On the Inadmissible Class of Multiple-Valued Faulty-Functions under Stuck-at Faults. 276-281
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