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ORCID24. HOTI 2016: Santa Clara, CA, USA
- 24th IEEE Annual Symposium on High-Performance Interconnects, HOTI 2016, Santa Clara, CA, USA, August 24-26, 2016. IEEE Computer Society 2016, ISBN 978-1-5090-2854-2
Session I: Routing and Network Topology
- Timo Schneider, Otto Bibartiu
, Torsten Hoefler:
Ensuring Deadlock-Freedom in Low-Diameter InfiniBand Networks. 1-8 - Ahmed H. Abdel-Gawad, Mithuna Thottethodi:
Scalable, Global, Optimal-bandwidth, Application-Specific Routing. 9-18 - Peyman Faizian, Md. Shafayat Rahman, Md Atiqul Mollah, Xin Yuan, Scott Pakin, Mike Lang:
Traffic Pattern-Based Adaptive Routing for Intra-Group Communication in Dragonfly Networks. 19-26
Session II: Switch Architecture and Traffic Management
- Qian Liu, Robert D. Russell, Ernst Gunnar Gran:
Improvements to the InfiniBand Congestion Control Mechanism. 27-36 - Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai:
Scalable High-Radix Modular Crossbar Switches. 37-44 - Fadoua Hassen, Lotfi Mhamdi:
A Clos-Network Switch Architecture Based on Partially-Buffered Crossbar Fabrics. 45-52
Session III: Memory and Data Caching
- Alexander Shpiner, Eitan Zahavi:
Race Cars vs. Trailer Trucks: Switch Buffers Sizing vs. Latency Trade-Offs in Data Center Networks. 53-59 - Yuta Tokusashi, Hiroki Matsutani:
A Multilevel NOSQL Cache Design Combining In-NIC and In-Kernel Caches. 60-67 - Cunlu Li, Dezun Dong, Xiangke Liao, Ji Wu, Fei Lei:
RoB-Router: Low Latency Network-on-Chip Router Microarchitecture Using Reorder Buffer. 68-75
Session IV: Node and Network Architectures
- Omer Arap, D. Martin Swany:
Offloading Collective Operations to Programmable Logic on a Zynq Cluster. 76-83 - Roberto Gioiosa, Thomas Warfel, Jian Yin, Antonino Tumeo, David J. Haglin:
Exploring Data Vortex Network Architectures. 84-91 - Md. Ashif I. Sikder, Avinash Kodi, William Rayess, Dominic DiTomaso, David W. Matolak, Savas Kaya:
Exploring Wireless Technology for Off-Chip Memory Access. 92-99
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