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ORCIDHiPEAC 2011: Heraklion, Crete, Greece
- Manolis Katevenis, Margaret Martonosi, Christos Kozyrakis, Olivier Temam:
High Performance Embedded Architectures and Compilers, 6th International Conference, HiPEAC 2011, Heraklion, Crete, Greece, January 24-26, 2011. Proceedings. ACM 2011, ISBN 978-1-4503-0241-8
Invited program
- Antonio González:
Moore's law implications on energy reduction. 1-2 - Saman P. Amarasinghe
:
PetaBricks: a language and compiler based on autotuning. 3
Parallelization & run-time systems
- Antoniu Pop, Albert Cohen:
A stream-computing extension to OpenMP. 5-14 - Konstantis Daloukas, Christos D. Antonopoulos, Nikolaos Bellas:
GLOpenCL: OpenCL support on hardware- and software-managed cache multicores. 15-24 - Samer Arandi, Paraskevas Evripidou:
DDM-VMc: the data-driven multithreading virtual machine for the cell processor. 25-34
Compilers
- Erven Rohou, Sergei Dyshel, Dorit Nuzman, Ira Rosen, Kevin Williams, Albert Cohen, Ayal Zaks:
Speculatively vectorized bytecode. 35-44 - Marcus Edvinsson, Jonas Lundberg, Welf Löwe:
Parallel points-to analysis for multi-core machines. 45-54 - Shisheng Li, Buqi Cheng, Xiao-Feng Li:
TypeCastor: demystify dynamic typing of JavaScript applications. 55-65
Memory systems; real-time systems
- R. Manikantan, R. Govindarajan, Kaushik Rajan:
Extended histories: improving regularity and performance in correlation prefetchers. 67-76 - Julien Dusser, André Seznec:
Decoupled zero-compressed memory. 77-86 - Souvik Bhattacherjee, Ankur Narang, Vikas K. Garg:
High throughput data redundancy removal algorithm with scalable performance. 87-96 - Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Yanos Sazeides, Mateo Valero:
RVC: a mechanism for time-analyzable real-time processors with faulty caches. 97-106
Optimization for multi-cores; parallelization & runtime systems
- Faizur Rahman, Jichi Guo, Qing Yi:
Automated empirical tuning of scientific codes for performance and power consumption. 107-116 - Dominik Grewe, Zheng Wang, Michael F. P. O'Boyle:
A workload-aware mapping approach for data-parallel programs. 117-126 - Matthew DeVuyst, Dean M. Tullsen, Seon Wook Kim:
Runtime parallelization of legacy code on a transactional memory system. 127-136 - Mario Kicherer, Rainer Buchty, Wolfgang Karl:
Cost-aware function migration in heterogeneous systems. 137-145
Modeling and analysis
- David Eklov, David Black-Schaffer, Erik Hagersten:
Fast modeling of shared caches in multicore systems. 147-157 - Kristof Du Bois, Tim Schaeps, Stijn Polfliet, Frederick Ryckbosch, Lieven Eeckhout:
SWEEP: evaluating computer system energy efficiency using synthetic workloads. 159-166 - Jason Mars, Lingjia Tang, Mary Lou Soffa:
Directly characterizing cross core interference through contention synthesis. 167-176
Memory hierarchies
- Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem:
Cache equalizer: a placement mechanism for chip multiprocessor distributed shared caches. 177-186 - Pierre Michaud:
Replacement policies for shared caches on symmetric multicores: a programmer-centric point of view. 187-196 - Ahmed Abousamra, Alex K. Jones, Rami G. Melhem:
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors. 197-205
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