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ORCIDEWDTS 2011: Sevastopol, Ukraine
- Vladimir Hahanov, Yervant Zorian:
9th East-West Design & Test Symposium, EWDTS 2011, Sevastopol, Ukraine, September 9-12, 2011. IEEE Computer Society 2011, ISBN 978-1-4577-1957-8 - Atieh Lotfi, Parisa Kabiri, Zainalabedin Navabi:
Configurable architecture for memory BIST. 1-5 - Taghi Mohamadi:
Designing power supply (PS) using digital PID based on AVR microcontrollers. 1-5 - Taavi Viilukas, Maksim Jenihhin
, Jaan Raik, Raimund Ubar, Samary Baranov:
Automated test bench generation for high-level synthesis flow ABELITE. 13-16 - Liviu Miclea, Teodora Sanislav:
About dependability in cyber-physical systems. 17-21 - George Dan Mois, Mihai Hulea, Silviu Folea, Liviu Miclea:
Self-healing capabilities through wireless reconfiguration of FPGAs. 22-27 - Jack H. Arabian:
Software testing of a simple network. 28-31 - Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto:
A unifying formalism to support automated synthesis of SBSTs for embedded caches. 39-42 - Alexander Kamkin:
Simulation-based hardware verification with time-abstract models. 43-47 - Vazgen Melikyan, Armen Durgaryan:
Programmable current biasing for low noise voltage controlled oscillators. 47-50 - Victor I. Djigan:
Adaptive signal processing in multi-beam arrays. 51-54 - Alexander Barkalov, Larysa Titarenko, Lukasz Smolinski:
Optimization of microprogram control unit with code sharing. 55-59 - Alexander Barkalov, Larysa Titarenko, Slawomir Chmielewski:
Synthesis of control unit with refined state encoding for CPLD devices. 60-65 - Vladimir Hahanov, Wajeb Gharibi, Dong-Won Park, Eugenia Litvinova:
Cybercomputer for information space analysis. 66-71 - Vladimir Hahanov, Dong-Won Park, Olesya Guz, Aleksey Priymak:
Verification and diagnosis of SoC HDL-code. 72-83 - Tiecoura Yves, Vladimir Hahanov, Omar Alnahhal, Mikhail Maksimov, Dmitry Shcherbin, Dmitry Yudin:
Diagnosis infrastructure of software-hardware systems. 84-89 - Olga Melnikova:
Overview of the prototyping technologies for Actel® RTAX-S FPGAs. 90-93 - Alexander Barkalov, Larysa Titarenko, Olena Hebda:
Hardware reduction for matrix circuit of control Moore automaton. 94-98 - H. Fatih Ugurdag, Okan Keskin, Cihan Tunc, Fatih Temizkan, Gurbey Fici, Soner Dedeoglu:
RoCoCo: Row and Column Compression for high-performance multiplication on FPGAs. 98-101 - Tarun Kumar Goyal, Amarpal Singh, Rahul Aggarwal:
Efficient selective compaction and un-compaction of inconsequential logical design units in the schematic representation of a design. 106-112 - Remigiusz Wisniewski, Monika Wisniewska, Marek Wegrzyn, Norian Marranghello:
Design of microprogrammed controllers with address converter implemented on programmable systems with embedded memories. 123-126 - Monika Wisniewska, Remigiusz Wisniewski, Marek Wegrzyn, Norian Marranghello:
Reduction of the memory size in the microprogrammed controllers. 127-130 - Lukasz Smolinski:
Maintaining uniformity in the processes of encryption and decryption with a variable number of encryption rounds. 131-135 - Jiri Jenícek, Ondrej Novák, Martin Chloupek:
Advanced scan chain configuration method for broadcast decompressor architecture. 140-143 - Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas, Mohammad Areef:
A programmable BIST with macro and micro codes for embedded SRAMs. 144-150 - Victor Barinov, Alexey Smirnov, Danila Migalin:
Modified protocol for data transmission in ad-hoc networks with high speed objects using directional antennas. 150-153 - Denis Muratov, Vladimir Boykov, Yuri Iskiv, Igor Smirnov, Valeriy Vertegel, Sergey Berdyshev, Yuri Gimpilevich, Gilad Keren:
High performance audio processing SoC platform. 154-157 - Sergii Berdyshev, Vladimir Boykov, Yuri Gimpilevich, Yuri Iskiv, Gilad Keren, Denis Muratov, Igor Smirnov, Valeriy Vertegel:
Methodology of the pre-silicon verification of the processor core. 158-160 - Vladimir Hahanov, Aleksandr Mischenko, Svetlana Chumachenko, Anna Hahanova, Aleksey Priymak:
Spam diagnosis infrastructure for individual cyberspace. 161-168 - Alexander Adamov, Vladimir Hahanov:
A security model of individual cyberspace. 169-172 - N. N. Levchenko, A. S. Okunev, D. E. Yakhontov:
Organization of pipeline operations in mapping unit of the dataflow parallel computing system. 173-176 - N. N. Levchenko, A. S. Okunev, D. E. Yakhontov, D. N. Zmejev:
Debugging and testing features of the dataflow parallel computing system components and devices. 180-183 - Yuri S. Bekhtin:
Adaptive wavelet codec for noisy image compression. 184-188 - Konstantin O. Petrosyants, E. V. Orekhov, D. A. Popov, Igor A. Kharitonov, Lev M. Sambursky, A. P. Yatmanov, A. V. Voevodin, A. N. Mansurov:
TCAD-SPICE simulation of MOSFET switch delay time for different CMOS technologies. 188-190 - L. Reva, Vitaliy Kulanov, Vyacheslav S. Kharchenko:
Design fault injection-based technique and tool for FPGA projects verification. 191-195 - Sergey G. Krutchinsky, Mikhail S. Tsybin:
Optimal schematic design of low-Q IP blocks. 196-199 - Alexander Chemeris, Svetlana Reznikova:
Parallelizing of Boolean function system for device simulation. 200-202 - Michael Balanov, Olga Mamedova:
Optimization some characteristics of continuous phase spread spectrum signal. 203-206 - Vladislav A. Lesnikov, Tatiana V. Naumovich, Alexander V. Chastikov, Sergey V. Armishev:
A generation of canonical forms for design of IIR digital filters. 221-224 - O. Kuznietsov, Oleksandr I. Tsopa:
Variant of wireless MIMO channel security estimation model based on cluster approach. 225-229 - Anatoly Belous, Vladislav Nelayev, Sergey Shvedov, Viktor Stempitsky, Tran Tuan Trung, Arkady Turtsevich:
Compact DSM MOSFET model and its parameters extraction. 230-232 - Artem Artamonov, Vladislav Nelayev, Ibrahim Shelibak, Arkady Turtsevich:
IGBT technology design and device optimization. 233-236 - N. L. Dudar, V. M. Borzdov:
Device-process simulation of discrete silicon stabilitron with the stabilizing voltage of 6, 5 V. 237-239 - V. A. Tverdokhlebov:
Geometrical approach to technical diagnosing of automatons. 240-243 - Vasily Kulikov, Vladimir V. Mokhor:
On experimental research of efficiency of tests construction for combinational circuits by the focused search method. 247-250 - Valentina Andreeva:
Test set compaction procedure for combinational circuits based on decomposition tree. 251-254 - Natalia Butorina, Sergey Ostanin:
Implementation by the special formula of an arbitrary subset of code words of (m, n)-code for designing a self-testing checker. 255-258 - H. J. Kadim:
Optimal fluctuations for satisfactory performance under parameter uncertainty. 259-263 - Borys Konorev, Volodymyr Sergiyenko, Georgiy Chertkov:
The evidential independent verification of software of information and control systems, critical to safety: Functional model of scenario. 263-266 - Konstantin O. Petrosyants, Eric Vologdin, Dmitry Smirnov, Rostislav Torgovnikov, Maxim V. Kozhukhov:
Si BJT and SiGe HBT performance modeling after neutron radiation exposure. 267-270 - Konstantin O. Petrosyants, Nikita I. Rjabov:
Thermal analysis of the ball grid array packages. 275-278 - Anzhela Yu. Matrosova, Alexey Melnikov, Ruslan Mukhamedov, Virendra Singh:
Selection of the state variables for partial enhanced scan techniques. 285-290 - Ngene Christopher Umerah, Vladimir Ivanovich Hahanov:
A diagnostic model for detecting functional violation in HDL-code of System-on-Chip. 299-302 - Gennady Krivoulya, Alexander Shkil, Dariya Kucherenko:
Competence as a support factor of the computer system operation. 303-310 - Kirill A. Sorudeykin:
A model of spatial thinking for computational intelligence. 311-318 - Mudar Almadi, Diaa Moamar, Vladimir Ryabtsev:
New methods and tools for design of tests memory. 319-325 - Dmitry A. Velychko, Iegor I. Vdovychenko:
A calculation of parasitic signal components digital filtration for the retransmission meter on the basis of FPGA. 335-336 - Victor Zviagin:
The Testware CAD. 337-340 - Alexander Zemliak, Antonio Michua, Tatiana M. Markina:
Lyapunov function analysis for different strategies of circuit optimization. 345-348 - Nina Khairova, Natalia Sharonova:
Modeling a logical network of relations of semantic items in superphrasal unities. 360-365 - Taghi Mohamadi:
Designing ISA card with easy interface. 372-376 - Taghi Mohamadi:
Real Time Operating System for AVR microcontrollers. 376-380 - Vladimir Hahanov, Karyna Mostova, Oleksandr Paschenko:
Infrastructure for testing and diagnosing multimedia devices. 394-399 - Taghi Mohamadi:
Designing an embedded system for interfacing with networks based on ARM. 407-410 - Alexander V. Drozd, Vyacheslav S. Kharchenko, Svetlana Antoshchuk, Yulian Sulima, Miroslav Drozd:
Checkability of the digital components in safety-critical systems: Problems and solutions. 411-416
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