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ORCIDAsianHOST 2019: Xi'an, China
- Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2019, Xi'an, China, December 16-17, 2019. IEEE 2019, ISBN 978-1-7281-3544-1
- Fan Zhang, Bolin Yang, Bojie Yang, Yiran Zhang, Shivam Bhasin, Kui Ren:
Fluctuating Power Logic: SCA Protection by $V_{DD}$ Randomization at the Cell-level. 1-6 - Mengmei Ye, Xianglong Feng, Sheng Wei:
Runtime Hardware Security Verification Using Approximate Computing: A Case Study on Video Motion Detection. 1-6 - Jason Portillo, Travis Meade, John Hacker, Shaojie Zhang, Yier Jin
:
RERTL: Finite State Transducer Logic Recovery at Register Transfer Level. 1-6 - Peizhou Gan, Yiheng Wu, Yuan Cao, Xiaojin Zhao:
A Highly-Reliable and Energy-Efficient Physical Unclonable Function Based on 4T All-MOSFET Subthreshold Voltage Reference. 1-6 - Si Wang, Wenye Liu, Chip-Hong Chang:
Detecting Adversarial Examples for Deep Neural Networks via Layer Directed Discriminative Noise Injection. 1-6 - Wenye Liu, Si Wang, Chip-Hong Chang:
Vulnerability Analysis on Noise-Injection Based Hardware Attack on Deep Neural Networks. 1-6 - Wei Hu, Yixin Ma, Xinmu Wang, Xingxin Wang:
Leveraging Unspecified Functionality in Obfuscated Hardware for Trojan and Fault Attacks. 1-6 - Jiawei Wang, Yuejun Zhang, Pengjun Wang, Zhicun Luan, Xiaoyong Xue, Xiaoyang Zeng, Qiaoyan Yu:
An Orthogonal Algorithm for Key Management in Hardware Obfuscation. 1-4 - Kwen-Siong Chong, Aparna Shreedhar, Ne Kyaw Zwa Lwin, Nay Aung Kyaw, Weng-Geng Ho, Chao Wang, Jun Zhou, Bah-Hwee Gwee, Joseph S. Chang:
Side-Channel-Attack Resistant Dual-Rail Asynchronous-Logic AES Accelerator Based on Standard Library Cells. 1-7 - Pengyong Zhao, Qiang Liu:
Density-based Clustering Method for Hardware Trojan Detection Based on Gate-level Structural Features. 1-4 - Abdulrahman Alaql, Domenic Forte, Swarup Bhunia:
Sweep to the Secret: A Constant Propagation Attack on Logic Locking. 1-6 - Pranesh Santikellur, Lakshya, Shashi Ranjan Prakash, Rajat Subhra Chakraborty:
A Computationally Efficient Tensor Regression Network based Modeling Attack on XOR APUF. 1-6 - Chengkang He, Aijiao Cui, Chip-Hong Chang:
Identification of State Registers of FSM Through Full Scan by Data Analytics. 1-6 - Ana Covic, Qihang Shi, Hao-Ting Shen, Domenic Forte:
Contact-to-Silicide Probing Attacks on Integrated Circuits and Countermeasures. 1-6 - Venkata Sreekanth Balijabudda, Dhruv Thapar, Pranesh Santikellur, Rajat Subhra Chakraborty, Indrajit Chakrabarti:
Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF. 1-6 - Paul Chin, Yuan Cao, Xiaojin Zhao, Leilei Zhang, Fan Zhang:
Locking Secret Data in the Vault Leveraging Fuzzy PUFs. 1-6 - Haocheng Ma, Jiaji He, Yanjiang Liu, Yiqiang Zhao, Yier Jin:
CAD4EM-P: Security-Driven Placement Tools for Electromagnetic Side Channel Protection. 1-6 - Libang Zhang, Xinpeng Xing, Junfeng Fan, Zongyue Wang, Suying Wang:
Multi-label Deep Learning based Side Channel Attack. 1-6 - Chongyan Gu, Chip-Hong Chang, Weiqiang Liu, Shichao Yu, Qingqing Ma, Máire O'Neill:
A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication. 1-6 - Salih Ergün:
Attack on a Microcomputer-Based Random Number Generator Using Auto-synchronization. 1-4 - Pengfei Qiu, Dongsheng Wang, Yongqiang Lyu, Gang Qu:
VoltJockey: Breaking SGX by Software-Controlled Voltage-Induced Hardware Faults. 1-6 - Junichi Sakamoto, Yusuke Nagahama, Daisuke Fujimoto, Yota Okuaki, Tsutomu Matsumoto:
Low-Latency Pairing Processor Architecture Using Fully-Unrolled Quotient Pipelining Montgomery Multiplier. 1-6
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