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ORCID12th Asia-Pacific Computer Systems Architecture Conference 2007: Seoul, Korea
- Lynn Choi, Yunheung Paek, Sangyeun Cho:
Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings. Lecture Notes in Computer Science 4697, Springer 2007, ISBN 978-3-540-74308-8 - Pen-Chung Yew
:
A Compiler Framework for Supporting Speculative Multicore Processors. 1 - Kunio Uchiyama:
Power-Efficient Heterogeneous Multicore Technology for Digital Convergence. 2-3 - Cheng Wang, Shiliang Hu, Ho-Seop Kim, Sreekumar R. Nair, Maurício Breternitz Jr., Zhiwei Ying, Youfeng Wu:
StarDBT: An Efficient Multi-platform Dynamic Binary Translation System. 4-15 - Arpad Gellert, Adrian Florea, Maria N. Vintan, Colin Egan, Lucian N. Vintan:
Unbiased Branches: An Open Problem. 16-27 - Yuan Liu, Hong An, Bo Liang, Li Wang:
An Online Profile Guided Optimization Approach for Speculative Parallel Threading. 28-39 - Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew, Sreekumar R. Nair, Robert Y. Geva:
Entropy-Based Profile Characterization and Classification for Automatic Profile Management. 40-51 - Yu Deng, Xuejun Yang, Xiaobo Yan, Kun Zeng:
Laplace Transformation on the FT64 Stream Processor. 52-62 - Lian Li, Hui Wu, Hui Feng, Jingling Xue:
Towards Data Tiling for Whole Programs in Scratchpad Memory Allocation. 63-74 - Sang Lyul Min, Eyee Hyun Nam, Young Hee Lee:
Evolution of NAND Flash Memory Interface. 75-79 - Dong Wang, Xiaowen Chen, Shuming Chen, Xing Fang, Shuwei Sun:
FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPs. 80-89 - Thomas Piquet, Olivier Rochecouste, André Seznec:
Exploiting Single-Usage for Effective Memory Management. 90-101 - Kang Yi, Shih-Yang Cheng, Young-Hwan Park, Fadi J. Kurdahi, Ahmed M. Eltawil:
An Alternative Organization of Defect Map for Defect-Resilient Embedded On-Chip Memories. 102-113 - Minyeol Seo, Ha Seok Kim, Ji Chan Maeng, Jimin Kim, Minsoo Ryu:
An Effective Design of Master-Slave Operating System Architecture for Multiprocessor Embedded Systems. 114-125 - Reza Moraveji, Hamid Sarbazi-Azad, Maghsoud Abbaspour:
Optimal Placement of Frequently Accessed IPs in Mesh NoCs. 126-138 - Jaehoon Song, Hyunbean Yi, Juhee Han, Sungju Park:
An Efficient Link Controller for Test Access to IP Core-Based Embedded System Chips. 139-150 - Sang-Hoon Ryu, Doo-Kwon Baik:
Performance of Keyword Connection Algorithm in Nested Mobility Networks. 151-162 - Kiyofumi Tanaka, Takenori Fujita:
Leakage Energy Reduction in Cache Memory by Software Self-invalidation. 163-174 - Daniel C. Vanderster, Amirali Baniasadi, Nikitas J. Dimopoulos:
Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational Clusters. 175-185 - Sang Jeong Lee, Hae-Kag Lee, Pen-Chung Yew:
Runtime Performance Projection Model for Dynamic Power Management. 186-197 - Kaveh Aasaraai, Amirali Baniasadi:
A Power-Aware Alternative for the Perceptron Branch Predictor. 198-208 - Akbar Sharifi, Hamid Sarbazi-Azad:
Power Consumption and Performance Analysis of 3D NoCs. 209-219 - Ming Z. Zhang, Vijayan K. Asari:
A Design Methodology for Performance-Resource Optimization of a Generalized 2D Convolution Architecture with Quadrant Symmetric Kernels. 220-234 - Shanq-Jang Ruan, Wei-Te Lin:
Bipartition Architecture for Low Power JPEG Huffman Decoder. 235-243 - Wensheng Tang, Shaogang Wang, Dan Wu, Wangqiu Kuang:
A SWP Specification for Sequential Image Processing Algorithms. 244-255 - Nan Wu, Qianming Yang, Mei Wen, Yi He, Changqing Xun, Chunyuan Zhang:
A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic Vision. 256-267 - Yong Dou, Jinbo Xu:
FPGA-Accelerated Active Shape Model for Real-Time People Tracking. 268-279 - Partha Tirumalai, Yonghong Song, Spiros Kalogeropulos:
Performance Evaluation of Evolutionary Multi-core and Aggressively Multi-threaded Processor Architectures. 280-289 - Shaoshan Liu, Jean-Luc Gaudiot:
Synchronization Mechanisms on Modern Multi-core Architectures. 290-303 - Hongbo Zeng, Kun Huang, Ming Wu, Weiwu Hu:
Concerning with On-Chip Network Features to Improve Cache Coherence Protocols for CMPs. 304-314 - Farshad Safaei, Ahmad Khonsari, Mahmood Fathy, N. Talebanfard, Mohamed Ould-Khaoua:
Generalized Wormhole Switching: A New Fault-Tolerant Mathematical Model for Adaptively Wormhole-Routed Interconnect Networks. 315-326 - Rajeev Thakur, William Gropp:
Open Issues in MPI Implementation. 327-338 - Marco Galluzzi, Enrique Vallejo, Adrián Cristal, Fernando Vallejo, Ramón Beivide, Per Stenström, James E. Smith, Mateo Valero:
Implicit Transactional Memory in Kilo-Instruction Multiprocessors. 339-353 - Yong Li, Zhiying Wang, Xue-mi Zhao, Jian Ruan, Kui Dai:
Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units. 354-363 - Yongfeng Pan, Xiaoya Fan, Liqiang He, Deli Wang:
A Bypass Mechanism to Enhance Branch Predictor for SMT Processors. 364-375 - Emre Özer, Stuart Biles:
Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor. 376-386 - Yiyu Tan, Anthony S. Fong, Xiaojian Yang:
Architectural Solution to Object-Oriented Programming. 387-398
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